1. Field of the Invention
This invention relates to data input/output processors and, in particular, to an audio processing apparatus and information processing apparatus that perform an input/output process of audio data.
2. Description of the Related Art
The Central Processing Unit (CPU) frequently reads image data or audio data from a main memory or writes the data into the main memory in an information processing apparatus such as a game console. In order to reduce the load on the CPU, Direct Memory Access (DMA) transfer is performed to transfer data between the main memory and an input/output device used for audio or video data. The DMA transfer is a method of accomplishing the data transfer between the main memory and the input/output device at high speed without the intervention of the CPU.
When the data stored in the buffer in the input/output device is consumed, data needs to be newly transferred between the main memory and the input/output device. When the buffer is in an empty state or in a full state, the input/output device sends an interrupt signal to the CPU. The CPU that has received the interrupt signal issues a DMA transfer instruction, and then data is newly exchanged between the main memory and the input/output device.
In a system where the DMA transfer is initiated by an interruption, whenever an interruption to the CPU is generated, the CPU needs to initiate an interrupt process. Thus, the increased number of interruptions increases the load on the CPU. Also, in the case where plural interrupt signals contend for a single interrupt signal line, interrupt signals generated simultaneously cause a delay in the propagation of the interrupt signals. It takes time for the propagation and processing of the interrupt signal under the above-described circumstances where plural interrupt signals are generated. The period from when an interrupt signal is generated and is then propagated to when the interrupt processing is completed, namely, the latency is increased, the issue of the DMA transfer instruction is delayed, and the efficiency of the data transfer process is degraded.